1. Technical Field
The present disclosure generally relates to a display apparatus, and particularly to a display apparatus including a display panel which integrates a driving circuit therein.
2. Description of Related Art
Referring to FIG. 1 and FIG. 2, a display panel 10 includes an active display area 12 and a periphery area 18 adjacent to the active display area 12. A driving chip 14 is disposed in the periphery area for driving electrical elements (not shown) in the active display area 12. A layout area 16 is also defined at the periphery area 18 and between the driving chip 14 and the active display area 12. A plurality of electrical wires 162 in the layout area 16 electrically connect the driving chip 14 and the electrical elements in the active display area 12. Each of the wires 162 has a same width. The layout area 16 may have an approximately trapezoid shape. The layout area 16 may be divided into a plurality of parts along a direction parallel to a boundary 19 between the display area 12 and the periphery area 18. The plurality of parts may include a center part 16a and two side parts 16b at opposite sides of the center part 16a. 
However, due to the length of a side of the driving chip 14 where the wires 162 extend from being much shorter than that of the boundary 19 of the active display area 12 where the signal pins are disposed, the lengths of the wires 162 located in the center part 16a are shorter than that of the wires 162 located in the two side parts 16b. That is, the lengths of the wires 162 which are far away from the center part 16a of the layout area 16 are much longer than that of the wires 162 in the center part 16a of the layout area 16. Because the lengths of the wires 162 are different, impedances of the wires 162 are accordingly different. For example, the minimum impedance value of the wire 162 in the most center part 16a may be 0.1 Ω, and the maximum impedance value of the wires 162 in the two farthest sides of the two side parts 16b may be 2053.2 Ω. Thus the difference of the impedance values can be 2053.1 Ω. When the size of the display panel 10 increases, the maximum difference between the impedance values of the wires 162 increases. Therefore, distortion grades of signals according to the impedances of the wires 162 are different from each other after the signals are transferred via the wires 162, and the display quality of the display panel 10 may be seriously deteriorated.
What is needed, therefore, is a display panel thereof which can overcome the described limitations.